Which of the following pair of gates can form a latch?
Cross-coupled NAND gates provide feedback needed to store one bit.
Ref: Digital Logic and Computer Design by M. Morris Mano
DIGITAL LOGIC
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Which of the following conditions is not allowed in an RS latch?
Asserting both R and S together gives a forbidden RS latch state.
Ref: Digital Logic and Computer Design by M. Morris Mano
For the number A[15:0] = 0110110010001111, A[14:13] is ______ A[3:2].
Both bit fields equal binary 11, so they have the same value.
Ref: Digital Logic and Computer Design by M. Morris Mano
If m is a power of 2, the number of select lines required for an m-input mux is:
Select lines must encode m inputs, requiring log2(m) binary select lines.
Ref: Digital Logic and Computer Design by M. Morris Mano
If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e
Locations fall by four while width doubles, so total bits halve.
Ref: Digital Logic and Computer Design by M. Morris Mano
Of the following circuits, the one which involves storage is
Only the RS latch among the choices provides storage through feedback.
Ref: Digital Logic and Computer Design by M. Morris Mano
We say that a set of gates is logically complete if we can build any circuit without using any other kind of gates. Whic
AND, OR and NOT together can implement any Boolean function.
Ref: Digital Logic and Computer Design by M. Morris Mano
A structure that stores a number of bits taken "together as a unit" is a
A register stores a group of bits together as one unit.
Ref: Digital Logic and Computer Design by M. Morris Mano
When the write enable input is not asserted, the gated D latch ______ its output.
Without write enable asserted, the latch holds its present output unchanged.
Ref: Digital Logic and Computer Design by M. Morris Mano
Circuit A is a 1-bit adder; circuit B is a 1 bit multiplier. (Hint: Construct the truth table for the adder and the mult
A one-bit adder uses XOR plus AND, while a one-bit multiplier uses only AND.
Ref: Digital Logic and Computer Design by M. Morris Mano
Because we wish to allow each ASCII code to occupy one location in memory, most memories are _____ addressable.
Each ASCII code fits in one byte, so memories are byte addressable.
Ref: Digital Logic and Computer Design by M. Morris Mano
For a memory with a 16-bit address space, the addressability is
Address bits give location count only, not the bits stored at each location.
Ref: Digital Logic and Computer Design by M. Morris Mano
